RCA Studio 2 Technical Information
Written by Paul Robson.
Last updated 8th November 2000
1) System Summary
Well, what else can one say. It is very simple hardware, but actually quite ingenious ; the video display is kind of a precursor of Sinclair's ZX80 and ZX81 displays in that it is partly done via hardware, partly done via software.
RCA 1802 Microprocessor clocked at 1.78 Mhz
2k x 8 ROM containing the interpreter and five games (Bowling, Freeway, Doodle, Patterns, Addition)
512 x 8 RAM (normally 256 bytes display RAM, 256 bytes program RAM)
Theoretical maximum of 64 pixels horizontally by 128 vertically, but normally 64 x 32, Monochrome.
Single channel Buzzer
2 x 10 key keypads (and a reset key)
A little light so you know it is switched on.
2) System Components
The Studio 2 is an all soldered double sided Printed circuit board. On the left, is the timing and video circuitry, covered by a tin frame, as the US regulations are paranoid about RF emissions. At the bottom, the cartridge connector. At the top , the connections to the keypads (the diode arrays are a giant logic gate). The main components are mounted on the centre of the board.
The following integrated circuits are used. Datasheets are available for all parts, except for the CDP1861. The link there takes you to a descriptive article.. :-
CDP1802CD <fn1305.pdf>is the main processor chip, and it is still available from Intersil
RCATA10171V1 <1861.htm>is actually, I believe, a CDP1861. It seems to have the same connections and functionality. This is a cheap video display, also used in the Cosmac and Elf machines. It uses the DMA facility of the 1802, together with some system code, to provide a 64 horizontal by up to 128 lines vertical resolution. In practice, a 64 x 32 pixel resolution is used. This part is no longer available.
CDP1822NCE <fn1074.pdf>(4 in total). This is a 256 byte x 4 bit Static RAM chip, still available from Intersil <http://www.intersil.com>. The four chips provide 512 bytes, or 1/2 k of RAM.
CDP1831NCE <cdp1831.pdf>(4 in total). This is a 1024 byte x 4 bit Read only Memory chip. The four chips contain the 2k System ROM. These are not standard connection ROMs (i.e. 2708 pinout) as the 1802 has a multiplexed address bus. Read the data sheet for more details. These parts are no longer available.
CD4515BE <4515.pdf>is a standard CMOS part, a 4-16 latch decoder. This is used to scan the keypads. For more information see Bill Richman's documentation <http://incolor.inetebr.com/bill_r> of the Elf system from 1977, the hardware is quite similar. The big array of diodes at the top of the board are part of this circuitry.
CD4001BE <4001.pdf>is a standard Quad 2 input NOR gate, and is used to decode ROM and RAM addresses.
CD4042BE <4042.pdf>is a standard Quad D type latch, which in conjunction with the above part, decodes the ROM and RAM addresses.
NE555 <ne555.pdf>is an oscillator chip, which provides the beep.
3) The connector
Note: An active low line, which would normally be indicated by drawing a bar over the name, is indicated by a prefix '!'
The connector is a single sided 22 way 0.156" pitch type. The bottom connectors (those nearest the edge of the machine) are the only ones used. The enumeration is from the left side of the board - the side where the tuner, switches and RF lead are.
However, plugging Cartridges in isn't that simple. A Studio II Cartridge has a metal comb that shorts out all the cartridge pins normally. This is pushed up and out of the way when the cartridge is inserted into the Studio 2 (by the two poles the cart fits onto). If you look up the hole you can see the edge of the lifting bar. [The best way to bodge this is to stick a couple of pieces of dowel in there].
PIN Connection Description
6 ROM Disable This pin is connected to the chip select (high) pins on the two right most CDP1831 ROM Chips
which hold the "game" code, the ROM data between $400 and $7FF. This line is normally pulled to
logic '1' via a resistor. In cartridges, this pin is normally connected to the adjacent pin, pin 7, ground,
disabling those two ROM chips.
15 5 volt (power)
19 TPA Signal This signal is a positive going High address latch , it is connected to pin 23 of the CDP1831 ROMs. It
is a simple logic circuit. First TPA is inverted (4001 pins 8,9,10), then it is exclusive NORed with
MRD (4001 pins 1,2,3). This gate only produces a logic '1' when MRD is logic 0, and TPA is logic
1, i.e. it goes from 0->1 when the high address byte is on address lines 0-7.
21 !MRD The active low memory read line direct from the 1802 CPU.
22 ROMCS This is a logic '1' going Chip select line from the ROMs inside the cartridge. This line should go to
logic '1' when the ROM is selected and enabled. See the section on "RAM Decoding".
4) Extracting Cartridge Images
The simplest way of extracting cartridge images is to acquire a 22 way 0.156" single sided PCB edge connector (Farnell sell a 22 way 0.156" Double Sided Connector, just ignore half the solder tags), and wire to it the signals for A0-A7, D0-D7, 5v, 0v, TPA and !MRD. It is not neccessary to connect pin 6 or pin 22 as they are signals back to the RCA Studio II.
Then by following the sequence listed below one can read the contents of the ROM. An important catch to watch for is that the ROMs are self-decoding. This means that they recognise their own addresses, so if you do it this way it is likely nothing will be read outside the range $0400-$07FF (and the MSBs of the address will probably be significant too).
It is theoretically possible for ROM to be stored between A00-BFF and E00-FFF, but to my knowledge no cartridge has done this ... yet. There is a standard cartridge PCB which has spaces for 2 CDP1831 Integrated Circuits (and the 2 Diodes that wire into the big OR gate to disable RAM). I would bet that all of these are mapped onto 400-7FF ; but it isn't mandatory for them to do so. One thing I have learnt from emulator development is never to assume any design or program will be sane.
The design for the cartridge dumper is here <dump.htm>. This has now been built and tested by me.
5) Extracting the system ROM
This is non-trivial, even compared against dumping ROMs from things like the Atari 2600.
Note: this worked perfectly on my (well John's) RCA Studio 2. It might not work on others, but I don't see why it shouldn't. Any damage done to your RCA Studio 2 as a result of doing this is just .... bad luck, sorry. As far as I can tell John's still works , it powers up, beeps, and seems to be generating the correct signals. I can't absolutely check it as I'm in PAL land and the S2 is an NTSC one. But it is producing the right signals and the right sounds, so it is almost certainly working as far as the video circuitry.
Definitely don't try this if you aren't reasonably handy with a soldering iron.
Cut the power to the 1802. This involves cutting three tracks. Top and Bottom of pin 40 on the 1802 (Vdd) and the top track of pin 12 (Vcc). Connect them together and connect them through a switch to a power source ; the resistor above the 1802 (right side) is suitable as it is the pull up resistor for WAIT (pin 2).
Connect flying leads to A0-A7,DB0-DB7, 5V and 0V (don't use the RCA Power) and MRD. By far the safest places to connect these is on the cartridge connector (see above)
Connect flying leads to TPA and TPB. You will have to connect these directly on the board.
When the power is cut to the 1802 and the rest of the board powered up the buses become open collector (I *think* this is what happens) and effectively "float". When this happens the A0-A7,MRD,TPA and TPB lines can be controlled via an I/O device, [I used an Atmel AVR Microcontroller on the STK200 Prototyping Board, ask if you want the software] and the DB0-DB7 lines read to retrieve data. For precise details of the protocols, read the Harris/Intersil Datasheet but in brief summary :-.
Initially, TPA = 0 and MRD = 1.
Set the high address on A0-A7
Set TPA to 1
Set MRD to 0
Set TPA to 0
Set the low address on A0-A7
Set TPB to 1
Set TPB to 0
Read the byte
Set MRD to 1
Don't forget the circuitry is fairly slow, so leave a decent delay of 4us or so between steps. Also, I found that on first power up it took a couple of seconds for the circuitry to stabilise and read reliable data.
When you've finished, just remove the I/O connector plug, and switch power back to the 1802, and it should work as well as it ever did.
6) The Colour Machine.
In Jack Spencer Jr's FAQ he refers to an Australian "Colour Studio 2" the M1200 , using information provided by "Dr Ido". Reading his component list shows a few extra bits.
Firstly, the ROMs are CDP1833CE types. These are newer, 1k x 8 ROMs. This suggests his machine has an extra 1k of ROM, and also that the decoding is different ; probably the extra system ROM will go in the space from A00-FFF which is not used at present (except for the RAM Mirror).
Secondly, there is an extra CDP1822NCE (256 byte x 4 RAM chip). Logic would suggest that this colour data is piggybacked on to the 256 byte of video data, thus this machine has effectively an 8 pixel x 32 line colour resolution. This is totally feasible - the chip could be read using the same read pulse as the main RAM and then it could be read and fed into the video circuitry.
Three of the bits would be Red,Green and Blue colours. The other could be unused, intensity or flashing, I don't know.
Thanks to Oliver Boisseau, I have discovered that the Hanimex MPT02 is a colour machine as well. It will run S2 ROMs (Tennis, anyway) but does so in two colour, but not black and white.
7) Memory Map
This is the memory map of the standard machine. The upper 4 bits are relevant ; those areas are unmapped, so technically they could be filled with Game ROM. When a cartridge is plugged in it replaces the ROM between 400 and 7FF, and can replace any other block of memory except 000-3FF (Interpreter) and 800-9FF (Data and Video RAM).
Actually, this is wrong, but right in practice.. What really is the case is that the ROM is where I say here, in page 0 (e.g. 0000-07FF) and not anywhere else. The RAM is all over the place. See section 17 on the decoding circuitry. Bizarrely you *could* have a game which was 63.5k in length if you really wanted to !
Address Range Contents Notes
000-2FF ROM RCA System ROM : Interpreter
300-3FF ROM RCA System ROM : Always present
400-7FF ROM Games Programs, built in (no cartridge)
400-7FF Cartridge Cartridge Games (when cartridge plugged in)
800-8FF RAM System Memory, Program Memory etc.
900-9FF RAM Display Memory
A00-BFF Cartridge Available for Cartridge games if required, probably isn't.
C00-DFF RAM/ROM Duplicate of 800-9FF - the RAM is double mapped in the default set up. This
RAM can be disabled and ROM can be put here instead, so assume this is ROM
for emulation purposes.
E00-FFF Cartridge Available for Cartridge games if required, probably isn't.
8) I/O Port Map
Port 1. (Input)
Reading this turns on the video circuitry, enabling the 60Hz interrupt which tells the 1802 that it is time for a new video frame. The value read is undefined, but the simplest way to turn on video is via CALL $0066 ; this is done by the system BIOS anyway.
Port 2 (Output)
The lower four bits of Port 2 select the keypad number to be read. Both keypads can be read this way. The value can be tested via EF3 and EF4 (see below).
EF1 (Input pin)
Goes to logic 1 at the end of the generating code, briefly. This is used to loop the interrupt driven video display continually, and check when it is to be terminated. It pulses as well when the video is not being displayed, exactly how is unknown.
EF3 (Input pin)
Logic '1' when the selected key on the left hand keypad is pressed
EF4 (Input pin)
Logic '1' when the selected key on the right hand keypad is pressed
Q (Output pin)
Turns the sound off and on. When logic '1', the beeper is on.
9) Graphics Hardware
The Graphics hardware is a combination of hardware and software. The CDP1861CE generates the video signals, the pixel data, and the DMA pulses which signal a sequence of DMA OUT actions to the 1802. Effectively the 1861 clocks the DMA OUT, reads the data it gets and converts that into pixels. The 1802 is interrupted every frame (60 times a second, NTSC standard) to set up the 1802's registers for the code.
The hardware is described in greater detail here <1861.htm>.
In theory, the RCA can support a resolution of 64 horizontal and up to 128 lines vertically. In reality, however, the display is a memory mapped type between 900 and 9FF, 64 pixels by 32, 8 bytes per line. This is what the code in the ROM supports. Theoretically, you could replace the Interrupt driver with a different one, but I doubt any cartridge did this.
10) Sound Hardware
Well, there is some sound hardware. It is an oscillator circuit which is gated by the Q line of the 1802. It can be turned on and off by the 1802 instructions SEQ and REQ respectively.
The sound circuit is based around an NE555, driven in Astable mode, with Ra = 400k, Rb = 480k and C = 1.8pf. This gives a working frequency of 625 Khz. To complicate things, the control line (pin 5) of the 555 is connected to 0v via a 10uf Electrolytic capacitor. The effect of this is to decay the frequency to about half its standard value in about 0.4 seconds. This gives the peculiar "warpy" effect you hear on power up.
Also, I believe there is a capacitor charging circuit to extend the length of the first "beep" on power up. This is programmed for only 0.08s, but is clearly longer than that.
11) Keyboard Hardware
To scan a given key, output its "key number" (0-9) to 1802 I/O Port 2. Only the four lower bits are significant. The status of the selected key can be obtained either via EF3 (for Player 1, the left handed player), and EF4 (for Player 2, the right handed player). Latching and Strobing is done via a 4515 4-16 latch decoder and the array of diodes. Whoever designed this had shares in a diode factory, obviously.
The strobing singla is obtained by inverting TPB (4001 gates 4,5,6) and exclusive Noring it with the output of Q1 (see "Decoding"). The net effect of this is that it it strobes when TPB = 1, and the "stored" value of N1 is 0.
The 4042 is used to latch various signals. These are latched on TPA. The connections are as follows :-
4042 "D" Pin 1802 Signal Description
4 N1 Latches the value of N1, used for strobing the keyboard hardware
7 0v Not Used
13 MA0 Address bit 8
14 MA1 Address bit 9
For full connections refer to any standard CMOS Datasheet.
13) System ROM
The System ROM <studio2.rom> is documented elsewhere. The listing is here <Bios.asm>, and it explains how program memory between 000 and 2FF operates. It has three parts. 000-2FF contains the interpreter for the pseudo machine language that RCA Studio 2 games are written in. 300-3FF contains the boot up code, some parts of the built in games, and some utility functions, written in that language.
Games are kept between 400 and 7FF. When a cartridge is plugged in, it replaces this part of the memory map. The "Pseudo Machine Language" from 300-3FF are always available. Most of it is not of any great use.
14) Is it the same as "Chip 8" ?
Absolutely not. The hardware is very similar ; the RCA Cosmac VIP/Elf has a lot more RAM than ROM, but the games are not compatible, no. If you are interested in such things, and look at the BIOS source <bios.asm> you will see that the pseudo "machine code" used by the Studio 2 is very similar to that of Chip 8 in many ways, and very different as to the specifics, especially the way the graphics operate. It is possible, but non trivial to port games either way.
15) CDP 1831 ROM Chip
Many thanks to Frank Palozzolo for providing reliable information about this ROM chip. It is rather unusual ; not only is it designed for a 1802, but it has address decoding logic built in. It is programmed to appear at a certain address at the same time as the code is programmed in it.
The "Clock" (ROM Pin 23) line is the High address latch line (Connector pin 19)
Chip selects (ROM Pins 21,20) are active high Chip selects, and are probably just wired to pin 24 ; they might be wired to connector pin 22
MRD! (ROM Pin 19) is the active low read signal, direct from the 1802 CPU
CEO (ROM Pin 18) is a pin that goes to logic '1' when a valid address which matches that masked into the ROM is selected.
16) CDP1822 RAM Chips
The 512 bytes of RAM in the Studio II is provided by 4 CDP1822 chips, each of which has 256 x 4 bytes of RAM. These do not have any form of internal address decoding, as the ROM Chips do. The pinout is shown below :-
The majority of the functions and connections are obvious. Those which are not are as follows :-
PIN Function Connection
17 CS2 Enables RAM chip when logic '1'. This is connected to the !Q3 line (left 2 RAM chips) or the
Q3 line (right two RAM chips) from the 4042 : the latched value of A8. This selects the upper
or lower 256 bytes of RAM.
18 OD Output is disabled when logic '1'. This is connected to !MRD from the 1802, so the output is
enabled when !MRD is logic '0', i.e. a read is taking place.
19 !CS1 Enables RAM chip when logic '0'. See decoding part later.
20 R/!W Controls read or write action. Connected to !MWR on the 1802.
17) The RAM Decoding Circuitry
The RAM Decoding circuitry is a ORed diode gate. This has 6 inputs, one from each of the CEO outputs on the onboard ROMs, one from the latched line A9 from the 4042, and one from the cartridge connector.
The function of this circuitry is to put a logic '0' on the RAM Chip invert select line (thus enabling it) provided all the following are true :-
None of the onboard ROM chips are selected (their CEOs are all logic '0')
A9 is logic '0'
Cartridge ROM is not mapped there.
Normally , this maps it onto 800-9FF and C00-DFF. (The onboard ROM uses 000-7FF, A9 is logic '1' for A00-BFF and E00-FFF). However, it is also mapped all over other bits of memory as well at any address from 1000-FFFF where A9 is logic '0' as the CDP1831 ROM chips only map onto 0000-07FF.
Of course, if you link pins 6 and 7 on the cartridge connector this disables the 2 right hand ROMs, thus allowing another ROM to appear between 0400 and 07FF.
This could cause chaos. Technically, I believe, ROM can be placed anywhere between 0400 and FFFF. The CDP1831 ROM chips can be programmed to fit anywhere in this map, and because of the ROMs being able to physically disable the RAM by driving Pin 22 to logic '1' they can also do things like map out the RAM.
I know that a ROM image always begins at $0400 and it would be common sense to use the 1k of ROM between 0400 and 07FF for 1k programs. However, any additional ROM (are there any >1k cartridges ?) can go at any address (except 0800-09FF as this would stuff the video interrupt routine).
This is the reason for the rather peculiar cartridge format. It is designed to put ROM anywhere.
18) What tools are available ?
If you want to program in "Pseudo Machine Language" at present there are no tools. If you want to write in 1802 assembler, you can use the TASM18.TAB <tasm18.tab> file and work with the shareware assembler "TASM". Your program needs to begin at $402 ; the bytes at $400 and $401 need to be $04 $02 : a machine code call to $0402 as the system will always boot up in PML mode.
An important note for assembly language programmers is that the interrupt routine will modify certain registers and memory locations. See the BIOS disasssembly for more details.
The carts binaries are in a special format ; this is documented at the main site <http://www.classicgaming.com/studio2/tasm18.tab> and a program called mcart.zip will produce files in this format.
19) Anything else goes here....
The "Clear" button is directly connected to the CLEAR line of the 1802 ; pressing it pulls this to logic 0, resetting the 1802 CPU.
Be careful when powering up the S2 from a seperate source. Do not rely on the 7805 regulator on the circuit board to limit the board voltage to 5V ; it doesn't seem to work that way. Power up by connecting 5v to the cartridge plug solder points.
And that's it !
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